A polishing apparatus, which has a polishing tool (e.g., a polishing tape or a fixed abrasive), is used for polishing a peripheral portion of a wafer. This type of polishing apparatus is configured to bring the polishing tool into contact with the peripheral portion of the wafer, while rotating the wafer, to thereby polish the peripheral portion of the wafer. In this specification, the peripheral portion of the wafer is defined as a region including a bevel portion which is the outermost portion of the wafer and a top edge portion and a bottom edge portion located radially inwardly of the bevel portion.
FIG. 8A and FIG. 8B are enlarged cross-sectional views each showing the peripheral portion of the wafer. More specifically, FIG. 8A shows a cross-sectional view of a so-called straight-type wafer, and FIG. 8B shows a cross-sectional view of a so-called round-type wafer. In the wafer W shown in FIG. 8A, the bevel portion is an outermost circumferential surface of the wafer W (indicated by a symbol B) that is constituted by an upper slope (an upper bevel portion) P, a lower slope (a lower bevel portion) Q, and a side portion (an apex) R. In the wafer W shown in FIG. 8B, the bevel portion is a portion (indicated by a symbol B) having a curved cross section and constituting an outermost circumferential surface of the wafer W. The top edge portion is a flat portion E1 located radially inwardly of the bevel portion B. The bottom edge portion is a flat portion E2 located opposite the top edge portion and located radially inwardly of the bevel portion B. The top edge portion E1 and the bottom edge portion E2 may be collectively referred to as edge portion. The edge portion may include a region where devices are formed.
In a fabrication process of SOI (Silicon on Insulator) substrate, there is a need to form a vertical surface and a horizontal surface on the edge portion of the wafer W, as shown in FIG. 9. The SOI substrate is manufactured by sticking a device substrate and a silicon substrate together. More specifically, as illustrated in FIG. 10A and FIG. 10B, a device substrate W1 and a silicon substrate W2 are stuck. together, and as illustrated in FIG. 10C, a back side of the device substrate W1 is scraped away by a grinder. As a result, the SOI substrate as illustrated in FIG. 10D is obtained.
A cross section of the edge portion as illustrated in FIG. 9 can be formed with use of a polishing apparatus shown in FIG. 11. Specifically, while a wafer W is rotated, a pressing member 100 presses an edge of a polishing tape 101 downwardly against the edge portion of the wafer W to thereby polish the edge portion of the wafer W. The polishing tape 101 has its lower surface serving as a polishing surface that holds abrasive grains thereon. This polishing surface is disposed parallel to the wafer W. With the edge of the polishing tape 101 located on the edge portion of the wafer W, the pressing member 100 presses the polishing surface of the polishing tape 101 against the edge portion of the wafer W to thereby form a right-angled cross section as shown in FIG. 9, i.e., the vertical surface and the horizontal surface on the edge portion of the wafer W.
In order to increase a throughput of the polishing apparatus shown in FIG. 11, it is preferable to use a polishing tape having a more abrasive or rough polishing surface. This is because a polishing rate (which is also referred to as a removal rate) of the wafer W is increased. However, use of the polishing tape having the rough polishing surface may roughen the vertical surface of the edge portion of the wafer W. Moreover, the edge portion of the wafer W may become chipped. Use of a polishing tape having a less abrasive or fine polishing surface can form a smooth vertical surface on the edge pardon of the wafer W. However, the use of the polishing tape having the fine polishing surface may result in a lowered polishing rate of the wafer W.